This invention relates to a network apparatus that transfers packets.
In recent years, there is known, in order to respond to future expansion of function, a network apparatus (router, switch) in which a network processor using a multi-core processor having a plurality of processor cores is installed. In particular, a packet transfer part that directly deals with user packets may use a multi-core network processor having an Ethernet interface or the like, an encryption capability, and a hardware-based L2 parser in addition to the capabilities of a general-purpose processor.
There is also known a network processor that uses a hardware logic alone to configure a packet scheduler which assigns input packets to the individual processor cores in order to ensure the wire speed, and determines the assignment of the packets to the individual processor cores based on the idling statuses of resources.
Japanese Patent Application Laid-open No. JP 2012-80426 A is the related art of the technical field of this invention. Japanese Patent Application Laid-open No. JP 2012-80426 A describes a communication apparatus including a control part and a processing part. The control part includes a monitoring packet transmission part that transmits a monitoring packet to the processing part, a monitoring packet response reception part that receives a response to the monitoring packet, and a failure detection part that detects a failure occurring in the processing part when the monitoring packet response reception part detects a response error of the monitoring packet and when the number of the response errors detected during a monitoring period is equal to or larger than a threshold value. The processing part includes a monitoring packet response part that returns a response to the control part.